Device Family: Intel® Agilex™ F-Series, Intel® Stratix® 10 MX, Intel® Stratix® 10 TX

Intel Software: Quartus Prime Pro

Type: Answers

Area: Intellectual Property


Last Modified: July 08, 2020
Version Found: v19.4
Version Fixed: v20.1
Bug ID: 1507721334
IP: JESD204B

Why does the JESD204C Intel® FPGA IP in base only mode generated in the Intel® Quartus® Prime Pro Edition version 19.4 require regeneration in Intel® Quartus® Prime Pro Edition version 20.1 and above?

Description

The JESD204C Intel® FPGA IP in Intel® Quartus® Prime Pro version 19.4 shares the synchronizer from the Transceiver (PHY).

The JESD204C Intel® FPGA IP in base only mode does not contain the Transceiver (PHY), which results in IP generation failure due to missing files for this mode. 

Workaround/Fix

This problem is fixed in Intel® Quartus® Prime Pro Edition software version 20.1 and above.