Due to a problem in the Intel® Quartus® Prime Pro software versions 19.2 to 20.1, the JESD204C Intel® FPGA IP Example Design may intermittently fail to operate correctly when performing repetitive resets tests, when using Intel® Stratix® 10 TX, Intel® Stratix® 10 MX or Intel® Agilex™ devices.
This is due to the possibility of sporadically triggering a short assertion of RX gearbox FIFO RD EMPTY during repetitive resets test.