Device Family: Intel® Stratix® 10 DX, Intel® Stratix® 10 GX, Intel® Stratix® 10 MX, Intel® Stratix® 10 PX, Intel® Stratix® 10 SX, Intel® Stratix® 10 TX

Intel Software: Quartus Prime Pro

Type: Answers

Area: Intellectual Property


Last Modified: June 19, 2020
Version Found: v20.1
Bug ID: 1508033530
IP: Avalon-MM Stratix 10 Hard IP for PCI Express

When using Windows* why does the Intel® FPGA P-Tile Avalon® Memory Mapped IP for PCI* Express  Example Design fail to generate?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software Windows* version 20.1, the Intel® FPGA P-Tile Avalon® Memory Mapped IP for PCI Express* Example Design will fail to generate in Gen4x4 Root Port mode.

Workaround/Fix

There is no workaround for this problem.

The example design can be generated correctly by the Linux* version of the Intel® Quartus® Prime Pro Edition software version 20.1.

This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition of software.