Device Family: Intel® Agilex™, Intel® Stratix® 10 MX, Intel® Stratix® 10 TX

Intel Software: Quartus Prime Pro

Type: Answers

Area: Intellectual Property


Last Modified: January 09, 2020
Version Found: v19.4
Version Fixed: v20.1
Bug ID: 14010512151
IP: ethernet

Why does the example design testbench for the single channel E-tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP 10GBASE-KR variant not complete in either Ncsim® or Xcellium®?

Description

Due to a problem in the Intel® Quartus® Prime Pro software version 19.4, the example design testbench for  E-Tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP variant with a single channel of 10GBASE-KR selected will not complete when using Ncsim® or Xcellium®. 

Workaround/Fix

To work around this issue, increase the number of channels in your 10GBASE-KR variant to greater than ‘1’ when simulating the example design with Ncsim or Xcellium.

This problem is fixed starting with the Intel® Quartus® Prime Pro software version 20.1.