Due a problem in the PCIe* DMA Controller Intel® Stratix® 10 FPGA IP, the DMA controller will send out two continuous MSI interrupts, one if for the DMA Read MSI vector and the other is for the DMA Write MSI vector.
When either a DMA Read or DMA Write operation completes, if the driver programs the “Write Data Mover Interrupt Control Register”(MSI Address and Vector For DMA Write) and the “Read Data Mover interrupt control register” (MSI Address and Vector For DMA Read), both interrupts will be sent.