Due to a problem with the Intel® Stratix® 10 CIC Intel® FPGA IP in Intel® Quartus® Prime Pro Edition version 18.1 software, you may observe the output of this IP stuck at 0 in simulation when the IP is configured with Decimator filter type and the "Enable variable rate change factor" feature is turned ON.
Device Family: Intel® Stratix® 10
Intel Software: Quartus Prime Pro
Last Modified: July 03, 2019
Version Found: v18.1
Bug ID: 1507173061