Article ID: 000076485 Content Type: Troubleshooting Last Reviewed: 01/25/2022

Why does the DisplayPort Intel® FPGA IP design example fail to generate a programming file when using the Intel® Quartus® Prime Pro Edition Software v19.1?

Environment

  • Intel® Quartus® Prime Pro Edition
  • DisplayPort
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software v19.1, designs that use the Nios® II/e processor core without a valid Nios® II processor license will fail to generate programming files even though the design compilation is successful. 

    The DisplayPort Intel® FPGA IP design example uses the Nios II/e processor core. Hence, it will be impacted by this problem. 

     

     

     

    Resolution

    To work around this problem in the Intel® Quartus® Prime Pro Edition Software v19.1, install the following patch and regenerate the DisplayPort Intel® FPGA IP design example:

    This problem is fixed starting with the Intel Quartus Prime Pro Edition Software v19.2.

    Related Products

    This article applies to 2 products

    Intel® Arria® 10 FPGAs and SoC FPGAs
    Intel® Stratix® 10 FPGAs and SoC FPGAs