Due to a problem in the Intel® Stratix® 10 Hard IP for PCI Express* Link Inspector, you may observe that the timestamp value is larger than the actual time.
For example, when using the Intel® Stratix® 10 Hard IP for PCI Express* coreclkout at 125MHz, the timestamp value will show approximately 20% over the estimated value (12ms compared to the actual 10ms).
This is due to a discrepancy between the user defined coreclkout at 125MHz or 250MHz, and the 100MHz clock always used by Link Inspector.