Due to a problem with the Intel® Quartus® Prime software version 18.0.1 and earlier, the Low Latency Ethernet 10G MAC Intel® FPGA IP only accepts the first XON request when implemented with Priority-Based Flow Control (PFC) queues. All subsequent XON requests will be ignored and the remaining paused queues will stay paused until the pause quanta expire or become zero.
Device Family: Intel® Arria® 10, Intel® Cyclone® 10 GX, Intel® Stratix® 10
Area: Intellectual Property
Last Modified: August 22, 2018
Version Found: v18.0
Bug ID: FB: 587132;