Article ID: 000082665 Content Type: Troubleshooting Last Reviewed: 11/16/2018

Why does the Intel® Low Latency 40-Gbps Ethernet IP forward RUNT packets as good packets?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Low Latency 40G 100G Ethernet
  • Low Latency 40G Ethernet Intel® FPGA IP for Arria® 10 and Stratix® V
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    Critical Issue

    Description

    Due to a problem with the Intel® Arria® 10 and the Intel® Stratix® V versions of the Intel® Low Latency 40-Gbps Ethernet IP, runt packets may be incorrectly forwarded to the user logic as good packets.

    The MAC register counters 0x900/0x901 CNTR_RX_FRAGMENTS and 0x904/0x905 CNTR_RX_FCS will not count these runt frames.

    Resolution

    To work around this problem, modify your user logic to filter short packets where SOP, EOP and VALID are asserted in the same clock cycle.

    This problem is not scheduled to be fixed in future release of the Intel® Quartus® Prime software.

    The Intel® Stratix® 10 version of the Intel® Low Latency 40-Gbps Ethernet IP is not affected by this problem.

    Related Products

    This article applies to 2 products

    Intel® Arria® 10 FPGAs and SoC FPGAs
    Stratix® V FPGAs