Device Family: Intel® Arria® 10

Type: Answers, Errata

Area: Intellectual Property

Last Modified: September 10, 2018
Version Found: v17.1 Update 1
Bug ID: FB: 556761;
IP: Arria 10 Hard IP for PCI Express

Why does the Intel® Arria® 10 Hard IP for PCI* Express in Root Port mode, LTSSM not stay in the Disabled state when Link Disable bit is set to 1.


When software sets the Link Disable bit in the Link Control register, the Root Port LTSSM is directed to the Disabled state. Once it enters the Disabled state, it should stay in that state unless the software resets the Link Disable bit.
However, when using the Intel® Arria® 10 Hard IP for PCI* Express, the Root Port exits the Disabled state even if the Link Disable bit is set.  


There is no workaround for this problem. This problem not scheduled to be fixed.