Device Family: Intel® Arria® 10, Arria® II, Arria® V, Intel® Cyclone® 10, Cyclone® IV, Cyclone® V, Intel® MAX® 10, Stratix® IV, Stratix® V

Type: Answers, How-To

Area: DSP, Intellectual Property

Last Modified: February 21, 2018
Version Found: v16.1
Version Fixed: v17.1
Bug ID: FB: 456447;
IP: Deinterlacer II (4K HDR passthrough)

Why does the Deinterlacer II IP core drop a line for every other frame in simulation?


Due to a problem with Intel® Quartus® Prime software version 16.1, you may encounter the above problem in simulation if the Deinterlacer II IP core is configured with "Bob" deinterlacing algorithm and produce one frame for every F0 field


To work around this problem configure the Deinterlacer II IP to produce one frame for every F1 field.

This problem has been fixed in Intel Quartus Prime software version 17.1.