When the H-tile Hard IP for Ethernet Intel® FPGA IP RX MAC receives frame size >= 65536, and enforce_max_frame_size is enabled, the frame output from RX MAC to user logic will be truncated to the frame size specified by max_rx_frame_size setting. A second invalid frame will output from RX MAC to user logic starting from byte-65536 to end of the super large frame.
Device Family: Intel® Stratix® 10
Type: Answers, Errata
Area: Intellectual Property
Last Modified: September 11, 2018
Version Found: v18.0
Bug ID: FB: 592839;