There is a limitation in the Intel® Arria® 10 PCIe* Hard IP which does not have a bypass buffer to store memory read packets. If there is no credit to send any memory read packets, these packets will stay in the queue which which will cause memory write completion TLPs to be blocked. The Intel® Arria® 10 PCIe* Hard IP does not allow any memory write completion TLP to pass a read memory packet because the Intel® Arria® 10 PCIe* Hard IP does not have a bypass buffer to put memory read packets aside and give way to write completion TLPs.
Device Family: Intel® Arria® 10, Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX, Intel® Cyclone® 10 GX
Type: Answers, Errata
Area: Intellectual Property
Last Modified: August 14, 2018
Version Found: v18.0
Bug ID: FB: 561131;
IP: Arria 10 Hard IP for PCI Express