Device Family: Intel® Stratix® 10 TX

Type: Answers

Area: Intellectual Property

Last Modified: September 26, 2018
Version Found: v18.1 Update 1
Bug ID: FB: 597593;
IP: ethernet

How do I use the “o_rx_pcs_fully_aligned” signal to tell the difference between a local fault condition and valid RX data when using the Intel® Stratix® 10 E-tile Hard IP for Ethernet Intel® FPGA IP configured in PCS+FEC status without the MAC?


To use the o_rx_pcs_fully_aligned signal to determine a local fault condition, implement the following pseudo-code on the RX MII port:

            If (o_rx_pcs_fully_aligned  == 0)  (

                    •        local fault pattern received on mii_data (RX)

                    •        remote fault is expected on the TX serial data


            else if (o_rx_pcs_fully_aligned   == 1 && mii_valid==1)

                    •        mii_data is a valid XGMII block

            else if (o_rx_pcs_fully_aligned   ==1 && mii_valid==0)

                    •        Ignore mii_data as it is not valid XGMII data



This information will be added to a future release of the Intel® Stratix® 10 FPGA E-Tile Hard IP for Ethernet Intel FPGA IP Core user guide.