Device Family: Intel® Stratix® 10 TX

Type: Answers

Area: Intellectual Property


Last Modified: September 26, 2018
Version Found: v18.1
Bug ID: FB: 597593;

How do I tell the difference between a local fault condition and valid RX data when using the Intel® Stratix® 10 E-tile Hard IP for Ethernet Intel® FPGA IP configured in PCS+FEC status without the MAC?

Description

Due to a problem in the Intel® Quartus® Prime software version 18.1 and earlier, the signal o_rx_pcs_fully_aligned is not exposed outside of the Intel® Stratix® 10 E-tile Hard IP for Ethernet Intel® FPGA IP when configured in PCS+FEC status without the MAC.  

Workaround/Fix

To work around this problem, the user must properly decode the RX MII port in order to determine a local fault condition. The pseudo-code snippet below illustrates such a decoder:

If (mii_data == 0x9C000001)  (

        •    local fault pattern received on mii_data (RX)

        •    remote fault is expected on the TX serial data

                )

 

else if (mii_data != 0x9C000001 && mii_valid==1)

        •    mii_data is a valid XGMII block

 

else if (mii_data != 0x9C000001 && mii_valid==0)

        •     ignore mii_data as it is not valid XGMII data

 

endif

 

This problem is scheduled to be fixed in a future release of the Intel Quartus Prime software.