Due to a problem with the LDPC Intel® FPGA IP in Intel® Quartus® Prime Pro software version 17.1 targetting Intel® Stratix® 10, you may observe the above error when compiling the simulation design example generated by the IP configured with WiMedia 1.5 standard and encoder mode in Modelsim.
Device Family: Intel® Stratix® 10
Type: Answers
Area: DSP, Intellectual Property
Last Modified: March 08, 2018
Version Found: v17.1
Bug ID: FB: 541664;
IP: DSP, LDPC
Error: (vlog-13067) ./../../src/altera_ldpc_pkg.sv(1.0): Syntax error, unexpected non-printable character with the hex value '0x8b'.
Description
Workaround/Fix
To work around this problem, comment out the following lines in the msim_setup.tcl:
1. eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../src/altera_ldpc_pkg.sv" -work work
2. eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../src/altera_ldpc_wimedia_enc.sv" -work work
This problem is scheduled to be fixed in a future version of the Intel Quartus Prime Pro software.