The DisplayPort IP Core Sink may assert CR_Lock due to receiver noise. The invalid CR_Lock may result in incorrect IRQ_HPD assertion before the video source initiates link training. DisplayPort Source devices should ignore this incorrect IRQ_HPD assertion until link training begins.
Device Family: Intel® Arria® 10, Arria® V, Cyclone® V, Stratix® V
Area: Intellectual Property
Last Modified: July 26, 2017
Version Found: v13.1
Bug ID: FB: 465199;