Due to a problem with the Intel® Arria® 10 Hard IP for PCI Express®, you will see no TS1 ordered sets or EIOS when the LTSSM enters the disabled state. The signal dl_up will also not de-assert in the disabled state.
Device Family: Intel® Arria® 10
Area: Intellectual Property
This problem is not scheduled to be fixed in any future Quartus® Prime software release. As a workaround, you can ignore the dl_up signal when the LTSSM is in the disabled state.