Device Family: Intel® Stratix® 10 GX

Type: Errata, KDB Area

Last Modified: October 25, 2017
Version Found: v17.1
Bug ID: FB: 495898;

Why do I see elaboration time errors when simulating Intel Stratix 10 designs in Aldec Riviera-PRO 2017.02?


Due to a bug in Aldec Riviera-PRO* 2017.02, you may see elaboration time errors similar to the line below when simulating Intel® Stratix® 10 designs.

# KERNEL: ERROR: The attributes for bit 'cr_rlpbk_en' have illegal conflicting values


Contact Aldec for a later version of Riviera-PRO with a fix for this problem.