Device Family: Intel® Arria® 10, Arria® II GX, Arria® II GZ, Arria® V, Cyclone® IV, Cyclone® V, Intel® MAX® 10, Stratix® IV, Stratix® V

Type: Answers, Documentation

Area: DSP


Last Modified: August 09, 2017
Version Found: v10.0
Bug ID: FB: 475380;
IP: Viterbi

Does the Viterbi IP support 1/3 mother code with high puncture rate?

Description

Yes, the Viterbi IP supports 1/3 mother code with high puncture rate (e.g 70/72 code rate). However, because of the high error rate, short message frame, tailbiting termination, and if the traceback (TB) is not long enough, the IP may not correctly predict the trellis starting/ending point and the IP eventually decodes the frame incorrectly.

Workaround/Fix

Assuming the traceback (TB) is 105 bits, the message frame length is 70 bits, encodedusing tailbiting termination and the code rate is 70/72. For this case, the Viterbi decoder is very poor for correcting errors.  Therefore, each input frame must feed consecutively for three times (two traceback length TB0 + TB1), followed by a number of zeros (TB2). The first and second output frame may still contain errors because the IP is unable to predict the trellis staring/ending point correctly, but with no error at the third output frame. Therefore, ignore the first and second output frame for this case.