Yes, you can use up to a 161 MHz clock for the Avalon-MM clock of Stratix® 10 10GBASE-KR PHY IP Core. The Stratix 10 Device Datasheet restricts the transceiver reconfiguration clock frequency to 125 MHz but the Stratix 10 10GBASE-KR PHY IP Core is an exception.
Device Family: Intel® Stratix® 10
Area: Intellectual Property
Last Modified: June 15, 2017
Version Found: v17.0
Bug ID: FB: 468666;