Device Family: Intel® Stratix® 10

Type: Answers

Area: HSIO


Last Modified: March 06, 2020
Version Found: v19.2
Bug ID: 18010393575

Does the ATX PLL to fPLL spacing rule on Intel Stratix 10 L-Tile and H-Tile devices apply to fPLLs in Core mode?

Description

Yes. The ATX PLL to fPLL spacing rule on Intel® Stratix® 10 L-Tile and H-Tile devices applies to fPLLs in Core mode and transceiver mode. If you violate this rule with your fPLL in either mode, the Intel Quartus® Prime software will issue a critical warning.

Workaround/Fix