Due to a problem with Quartus® Prime Pro software version 17.1, the H-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP may output incorrect rx_clkout frequency if the PMA and PCS bonding mode is enabled for non-PCIe mode. The incorrect rx_clkout frequency will cause the RX Core FIFO to become full.
Device Family: Intel® Stratix® 10
Version Found: v17.1
Bug ID: FB: 549014;