Device Family: Intel® Stratix® 10 TX

Type: Answers, KDB Area

Area: HSIO


Last Modified: May 17, 2018
Version Found: v18.0
Bug ID: FB: 559350;

Why do I see a Bit Error Rate (BER) of 1 after drawing an eye in the Intel® Transceiver Toolkit when using Intel Stratix® 10 E-Tile transceivers? 

Description

Due to a problem with the error counter registers of the Stratix 10 E-Tile transceivers, you may see a BER of 1 after drawing an eye in the Intel Transceiver Toolkit.

You may also see the following message in the Transceiver Toolkit message pane.

"Hard PRBS checker error counter has saturated. The checker has been stopped."

Workaround/Fix

To work around this problem you should reprogram the Intel Stratix 10 FPGA.