The efficiency monitor test pattern is implemented to run only one loop regardless of the traffic generator parameter setting.
Device Family: Intel® Stratix® 10 MX
Intel Software: Quartus Prime Pro
Type: Answers
Area: EMIF
Last Modified: July 21, 2020
Version Found: v19.1
Bug ID: 1508184108
IP: Stratix 10 External Memory Interfaces
Can the Intel® Stratix® 10 HBM2 efficiency monitor test pattern run in an infinite loop?
Description
Workaround/Fix
To make the test pattern run continuously, toggle the wmcrst_n_in signal after the traffic_gen_pass signal is asserted high.