Device Family: Intel® Arria® 10

Type: Answers

Area: EMIF


Version Found: v19.1
Bug ID: 1409444124
IP: Altera PHYLite for Parallel Interfaces

Why does the Intel® Arria® 10 PHYLite IP fail simulation when the data configuration is set to “Differential”?

Description

Due to a problem in the Intel® Quartus® Prime software version 19.1, you may see simulation read errors when you set the data configuration to “Differential”.

Workaround/Fix

To work around these errors, open the *phylite_io_bufs.sv file under the altera_phylite_arch_nf_*\sim directory.

 

Change the line from:

assign group_data_out_n [grp_num][47 : GROUP_PIN_WIDTH[grp_num]-1]={(MAX_WIDTH-GROUP_PIN_WIDTH[grp_num]){1'b0}};

to

assign group_data_out_n [grp_num][47 : GROUP_PIN_WIDTH[grp_num]]={(MAX_WIDTH-GROUP_PIN_WIDTH[grp_num]+1){1'b0}};

 

This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime software.