Device Family: Intel® Arria® 10

Type: Errata

Area: EMIF


Last Modified: January 09, 2019
Version Fixed: v18.0
Bug ID: FB: 2205660782;
IP: Arria 10 External Memory Interfaces

Why does the interface 1 port simulate incorrectly when the abstract phy simulation model is used in the Intel® Arria® 10 DDR4 Ping Pong PHY IP?

Description

When using the Intel® Quartus® Prime software version 17.1.2 or earlier, you may see the interface 1 port simulate incorrectly when the Intel Arria® 10 DDR4 Ping Pong PHY IP is configured with both the Abstract phy for simulation option and the Write DBI option enabled.

Note that the interface 0 port simulates correctly.

Workaround/Fix

This problem is fixed in the Intel® Quartus® Prime software version 18.0 or newer.