Device Family: Intel® Arria® 10

Type: Errata

Area: EMIF

Last Modified: December 04, 2018
Bug ID: FB: 2206125215;
IP: Altera PHYLite for Parallel Interfaces

Why can't the interface clock frequency be set to a value between 137.5MHz to 149.9MHz for the Intel® Arria® 10 PHYLite IP when using quarter rate mode?


Due to the PLL VCO setting limitation, the Intel® Arria® 10 PHYLite IP doesn’t support the frequency range between 137.5MHz to 149.9MHz when using quarter rate mode.