Due to a problem in the Intel® Quartus® Prime Pro Software version 18.0, an Intel Stratix® 10 MX device will fail configuration when the Universal Interface Block (UIB) PLL reference clock is not running even if there is no HBM2 IP in the project.
Device Family: Intel® Stratix® 10 MX
Intel Software: Quartus Prime Pro
Type: Answers
Area: EMIF
Why does the Intel® Stratix® 10 MX device fail configuration?
Description
Workaround/Fix
Connect up the UIB PLL reference clock to the Intel Stratix 10 MX device and provide a clock that meets the required specification shown in the Stratix 10 Device family Pin Connection Guidelines
This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro software.