Device Family: Intel® Arria® 10, Intel® Stratix® 10

Intel Software: Quartus Prime Pro, Quartus Prime Standard

Type: Answers

Area: EMIF

Last Modified: September 05, 2018
IP: Arria 10 External Memory Interfaces, Stratix 10 External Memory Interfaces

What is the pull-up resistor guideline for the DDR4 alert_n signal?


The recommendation is to start with a 10k ohm pull-up resistor to 1.2V for the DDR4 alert_n signal, and then the resistor can be adjusted to a different value as long as it meets the FPGA I/O buffer VIL and VIH specifications (refer to the FPGA device datasheet under the I/O Standards specification).
Perform a board signal integrity simulation to verify the optimal setting.