Device Family: Intel® Arria® 10, Intel® Stratix® 10

Intel Software: Quartus Prime Pro, Quartus Prime Standard

Type: How-To

Area: EMIF


Last Modified: September 05, 2018
Version Found: v18.0
Bug ID: FB: 568061;
IP: Arria 10 External Memory Interfaces, Stratix 10 External Memory Interfaces

Internal Error: Programmable pre-emphasis option is set to 1 for pin dut_mem_mem_par(0)~pad, but setting is not supported by I/O standard SSTL-12 with Slew Rate 0

Description

You may see an error similar to the one shown below when compiling the DDR4 IP in the Intel® Quartus® Prime software versions 18.0 and 18.0.1.

 Internal Error: Programmable pre-emphasis option is set to 1 for pin <signal_name>~pad, but setting is not supported by I/O standard SSTL-12 with Slew Rate 0

The <signal_name> is one of the DDR4 address/command signals.

 

Workaround/Fix

In the Intel Quartus Prime project .QSF file, enter the following assignment:

set_instance_assignment -name PROGRAMMABLE_PREEMPHASIS 0 -to <signal_name>

Add a similar assignment for each affected DDR4 signal.