When using the Intel® Quartus® Prime Software version 18.1 and upgrading an existing Intel Stratix® 10 design containing a HPS EMIF and a non-HPS EMIF placed in the same I/O column, you may see a similar error as shown below during compilation.
Error(16282): Two or more external memory interface (EMIF) IP cores in the same column use different calibration routines. The error occurs when IP cores placed in the same column are generated in different versions of Quartus; or, when a memory interface for the hard processor system (HPS) is placed in the same column with a normal memory interface. Regenerate all memory interface IP cores in the current version of Quartus if cores were generated in different Quartus versions. A normal memory interface cannot be placed in the same column as an HPS memory interface.
Info(16283): IP: ed_synth_emif_s10_0 (hex file: ed_synth_emif_s10_0_altera_emif_arch_nd_181_xcenvri_iossm_synth.hex)
Info(16283): IP: HPS_TEst_Qsys_emif_s10_hps_0 (hex file: HPS_TEst_Qsys_emif_s10_hps_0_altera_emif_arch_nd_180_rbnwjza_iossm_synth.hex)
Note that the hierarchy path and file names may differ for a given design.