Device Family: Intel® Arria® 10

Type: Answers

Area: EMIF


Last Modified: June 22, 2017
Bug ID: FB: 453709;
IP: Arria 10 External Memory Interfaces

Why does the mem_reset_n signal toggle multiple times at the first assertion in the Skip Calibration simulation mode?

Description

This observation is expected and does not cause any malfunction of the PHY operation during simulation. In Full Calibration simulation mode, the EMIF IP performs a full reset initialization sequence, and consequently, those glitches don't occur.