Device Family: Intel® Arria® 10

Type: Answers

Area: EMIF

Version Found: v16.0
Bug ID: FB: 432146;
IP: Arria 10 External Memory Interfaces

not valid


Due to the Intel® Arria® 10 external memory interface (EMIF) intellectual property (IP) accessing the MMR registers during the calibration phase, the mmr_readdata_valid signal assertion can be seen from the MMR slave port. This behavior can cause the MMR slave port Avalon® bus to lock up.

Here is a related KDB answer:


This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime software.