The CKE signal is pulled down to GND on the DDR3 HiLo daughter card and terminated with a thevenin parallel termination on the DDR4 HiLo daughter card.
Device Family: Intel® Arria® 10, Intel® Stratix® 10
All address and command signals including the CKE signal should use a fly-by termination for Arria®10 and Stratix®10 DDR3 and DDR4 interfaces. These signals should be terminated with a resistor to VTT at the end of the fly-by topology. This termination is required only for discete memory device implementations and is not required for DIMMs.