Due to a problem in the Intel® Stratix® 10 Hard Processor System Technical Reference Manual s10_5v4.pdf version 2018.08.08, the names of HPS I2C Signals for FPGA Routing are different when compared with Platform designer>Generate>Show Instantiation Template.
Device Family: Intel® Stratix® 10 SX
Intel Software: Quartus Prime
Type: Answers
Area: Embedded
Last Modified: May 20, 2019
Version Found: v19.1
Bug ID: 1507167735
Document ID: s10_5v4
Document Version Found: 2018.08.08
Document Version Fixed: December 23, 2018
IP: Stratix 10 Hard Processor System
Why are the names of Intel® Stratix® 10 Hard Processor System(HPS) I2C signals for FPGA routing in s10_5v4.pdf different to those shown in Platform designer >Generate>Show Instantiation Template?
Description
Workaround/Fix
The Intel® Stratix® 10 Hard Processor System Technical Reference Manual is due to be updated to change the names of HPS I2C signals for FPGA routing as shown below:
Current Signal Name |
Change it to |
i2c<#>_scl |
i2c<#>_scl_in_clk |
i2c<#>_out_clk |
i2c<#>_clk_clk |
i2c<#>_sda |
i2c<#>_sda_i |
i2c<#>_out_data |
i2c<#>_sda_oe |
This problem is scheduled to be fixed in a future release of the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.