Device Family: Intel® Stratix® 10 SX

Intel Software: SoC EDS

Type: Answers, Errata

Area: Embedded


Last Modified: October 16, 2018
Version Found: v18.1
Bug ID: FB: 594204, 598936, 583740;
IP: Stratix 10 Hard Processor System

Why does the Intel® Stratix® 10 SoC FPGA Hard Processor System hang after a warm reset or watchdog warm reset?

Description

The Intel® Stratix® 10 SoC FPGA Secure Device Manager(SDM) is not able to bring the HPS out of warm or watchdog reset after a reconfiguration. Additionally if a warm reset or watchdog warm reset has occurred, any subsequent attempt to reconfigure the device may fail.

 

Workaround/Fix

Please use the Intel Quartus™ Prime Pro software version 18.1 build 222 with patch 0.01, available at:

quartus-18.1-0.01dp1-linux.run

quartus-18.1-0.01dp1-windows.exe