Article ID: 000077424 Content Type: Troubleshooting Last Reviewed: 08/16/2023

Why does the HPS Boot source in the Hard Processor System Intel® Stratix® 10 FPGA IP not change where the HPS looks for the second stage boot loader?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The HPS SSBL location dropdown in the HPS Boot source section on the FPGA Interfaces tab of the Hard Processor System Intel® Stratix® 10 FPGA IP is new for 18.1.  Its purpose is to allow the user to choose where the HPS first stage bootloader should load the second stage boot loader from.  However, changing this dropdown does not affect HPS behavior, as the information is only passed from Intel® Quartus® to Secure Device Manager firmware.  The setting is not observed by U-Boot and thus appears to have no effect.

    Resolution

    In order to change the HPS SSBL location, the U-Boot source code needs to be changed. The setting is configured in the function spl_boot_device() from the file arch/arm/mach-socfpga/spl_s10.c.  For an example of how to change the HPS SSBL location to the SDM QSPI flash, use the instructions available here: Stratix10SoCSingleQspiFlashBoot

     

    This feature is fully supported starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 20.1 with their version U-Boot-socfpga.

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 SX SoC FPGA
    Intel® Stratix® 10 TX FPGA