The HPS SSBL location dropdown in the HPS Boot source section on the FPGA Interfaces tab of the Hard Processor System Intel® Stratix® 10 FPGA IP is new for 18.1. Its purpose is to allow the user to choose where the HPS first stage bootloader should load the second stage boot loader from. However, changing this dropdown does not affect HPS behavior, as the information is only passed from Quartus to Secure Device Manager firmware. The setting is not observed by U-Boot, and thus appears to have no effect.
Device Family: Intel® Stratix® 10 SX, Intel® Stratix® 10 TX
Intel Software: SoC EDS