Device Family: Intel® Stratix® 10 SX, Intel® Stratix® 10 TX

Intel Software: Quartus Prime Pro

Type: Answers

Area: Embedded


Last Modified: December 13, 2018
Version Found: v18.1
Bug ID: FB: 2007758391;

Why does Platform Designer hang when modifying a design with the Hard Processor System Intel® Stratix® 10 FPGA IP?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software version 18.1, Platform Designer may hang when editing a system with the Hard Processor System Intel Stratix 10 FPGA IP because there is not enough java heap space allocated by default. 

Workaround/Fix

To work around this problem, increase the allocated java heap space as necessary by starting Platform Designer from the command line with the option “--jvm-max-heap-size=<size>m”.  It is recommended to use 16384 for <size>, but this may need to be increased to 32768 for large systems.  For example,  “qsys-edit –jvm-max-heap-size=16384m my_project.qsys”.  This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro Edition software.