SoC FPGA Linux Kernel Versions 4.17 June 2018 and later, and 4.18 and later:
- Only the top level reference clock frequencies for the Intel® Stratix® 10 SX are specified in the Linux Device Tree.
- The clock tree setup as set on the Stratix 10 HPS Component in the Intel® Quartus® Prime Pro Platform Designer design is loaded from the FPGA bitstream by the Clock Manager Driver.
For SoC FPGA Linux Kernel version 4.17 (pre June 2018) and earlier:
The Linux Device Tree contains information on the full clocking structure of the Intel® Stratix® 10 SX, and must reflect the clock setup in the Stratix 10 HPS Component, in the Intel® Quartus® Prime Pro Platform Designer design.
If the clocking structure is not updated to reflect your board and design, peripherals may operate incorrectly in Linux.
The Linux kernel contains a generic top level device tree and an example device tree for the Intel Stratix 10 SX Development kit:
socfpga_stratix10.dtsi #Generic top level device tree
Socfpga_stratix10_socdk.dts # Example device tree for the Intel Stratix 10 SX Development kit, Golden Hardware Reference Design (GHRD) and Golden Software Reference Design (GSRD)
- The Golden Hardware Reference Design (GHRD) is shipped with Intel FPGA SoC EDS in the examples/hardware/ folder
- The Golden Software Reference Design (GSRD) can be downloaded from Rocketboards.org https://rocketboards.org/foswiki/Documentation/GSRD