The Quartus® Prime software and Intel® FPGA SDK for OpenCL™ license requires the Ethernet port to be named eth0. RedHat / CentOS 7.x has Ethernet port names such as enpXXXXX (i.e. enp20s63). Users may see following error while compiling:
For further information, refer to the FlexNet Licensing documentation, available at "www.flexerasoftware.com".
Could not acquire a valid license for the Intel(R) FPGA SDK for OpenCL(TM).
Error: Verilog generator FAILED.