Device Family: Intel® Arria® 10

Area: Documentation, Intellectual Property

Last Modified: April 17, 2017
Version Found: v16.0
Bug ID: FB: 400011;
IP: 25G 50G Ethernet, Low Latency 40G 100G Ethernet

Some High-Speed Ethernet IP Core User Guides Do Not Clarify Lack of Support for VHDL


The user guides for the following IP cores do not clarify that the IP cores do not support VHDL models:

  • Low Latency 40-Gbps Ethernet IP core
  • Low Latency 100-Gbps Ethernet IP core
  • 25G Ethernet IP core 

The parameter editors for these IP cores appear to offer the option to select VHDL simulation and synthesis models.  Therefore, the user guide should clarify that these models are not actually available. In addition, the user guide should clarify that the VHDL-specific files the Quartus® Prime software generates with the IP core are not functional.


In the IP core parameter editor, ensure you select Verilog HDL for the models you wish to generate. Be aware that .vhd and other VHDL-specific files listed in the user guide are not functional.