You may see this error when configuring Intel® Stratix® 10 SoC devices using Intel® Quartus® Prime Programmer or quartus_pgm if the FPGA JTAG and HPS JTAG are chained. When chained internally, the HPS will appear at device index 1 and the FPGA will be at device index 2.
Device Family: Intel® Stratix® 10 DX, Intel® Stratix® 10 SX, Intel® Stratix® 10 TX
Intel Software: Quartus Prime Pro
Last Modified: January 06, 2021
Version Found: v20.1
Bug ID: 18010400116