Device Family: Intel® Agilex™, Intel® Stratix® 10

Intel Software: Quartus Prime Pro

Type: Answers

Area: Component

Last Modified: August 27, 2020
Version Found: v19.4
Bug ID: 18010932026

Why are the CONF_DONE and INIT_DONE signals not de-asserted once nCONFIG goes low in Intel® Stratix® 10 and Intel® Agilex™ FPGAs operating in PMBus Slave Mode?


When using ntel® Stratix® 10 and Intel® Agilex™ FPGAs,  CONF_DONE and INIT_DONE signal will go low typically in less than 1ms after nCONFIG goes low.
In PMBus (SmartVID) Slave mode, it may take longer time for the Secure Device Manager (SDM) to de-assert the CONF_DONE and INIT_DONE, depending on when the VOUT_COMMAND is issued by the external master.
In this mode, a handshake between the PMBus master and FPGA is required to adjust the core power supplies to the nominal value after nCONFIG goes low.
The SDM de-asserts the CONF_DONE and INIT_DONE signal only after receiving the VOUT_COMMAND from the external master.


This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.