Device Family: Intel® Stratix® 10 MX

Type: Answers

Area: Component, Documentation


Last Modified: June 12, 2020
Version Found: v20.1
Bug ID: 1508028114
Document ID: PCG-01020
Document Version Found: April 20, 2020

What is the correct guideline for sharing VCCIO_UIB_(BL,TL) , VCCIO_SDM, VCCIO and VCCIO3V supplies when using Intel Stratix 10® MX devices?

Description

Due to a problem in  Intel® Stratix® 10 Device Family Pin Connection Guidelines  version 2020.04.20 version, Table-47 and Table-48 titled Power Supply Sharing Guidelines for Intel Stratix® 10 MX (E-Tile) show VCCIO_UIB_(BL,TL) , VCCIO_SDM, VCCIO and VCCIO3V sharing the same voltage by mistake.

VCCIO_UIB_(BL, TL) should be 1.2V, VCCIO_SDM should be 1.8V. VCCIO and VCCIO3V is variable. VCCIO, VCCIO3V and VCCIO_SDM can be shared with 1.8V from the same regulator when they are all 1.8V.

Workaround/Fix

This problem is scheduled to be resolved in a future version of the Intel® Stratix® 10 Device Family Pin Connection Guidelines.