Device Family: Intel® Agilex™, Intel® Stratix® 10

Type: Answers

Area: Component


Last Modified: December 02, 2020
Version Found: v20.3
Bug ID: 14013033167

Does the non-volatile configuration register need to be set when a Micron QSPI flash ROM device is used for Intel® FPGA Parallel Flash Loader II IP?

Description

Yes.  When a Micron QSPI flash ROM device is used for the Intel® FPGA Parallel Flash Loader II (PFL II) IP and 3rd party programmer or user’s own solution is used to program a programming file to the QSPI flash ROM device, the 16-bit non-volatile configuration register (NVCR) of the QSPI flash ROM device needs to be set to 0xFFEE manually.  This setting disables the reset/hold feature on DQ3, enables 4-byte address mode, and leaves the other settings default.
When the Quartus Prime Programmer is used to program a Micron QSPI flash ROM for the Intel® FPGA PFL II IP, the NVCR is automatically set to 0xFFEE during programming a programming file.

Workaround/Fix