Device Family: Intel® Stratix® 10

Intel Software: Quartus Prime Pro

Type: Answers

Area: Component


Last Modified: Tue Mar 05 2019 06:22:00 GMT-0800
Version Found: v18.1 Update 1
Bug ID: 1409007821
IP: Altera S10 Mailbox Client Core

Why does the QSPI_ERASE or AsmiSectorErase command fail with error 0x3FF when issued through the Mailbox Client Intel® Stratix® 10 FPGA IP or Stratix 10 Serial Flash Mailbox Client Intel FPGA IP respectively?

Description

Due to a problem with the  Mailbox Client Intel® Stratix® 10 FPGA IP and Stratix 10 Serial Flash Mailbox Client Intel FPGA IP in Intel Quartus® Prime Pro software version 18.1 Update 1, issuing a QSPI_ERASE or AsmiSectorErase command in the respective IP may fail with error 0x3FF.

Workaround/Fix

A workaround is to use the opcode to perform a sector erase. The script below is an example flow using TCL

# Enable “Write Enable”

master_write_32 $m $AsmiWrEnable 0x1

# Write 4 byte (depending on the byte addressing)

master_write_32 $m $AsmiNumbByte 0x4

# Write the control (opcode) – Opcode varies for different flash devices. Check the flash datasheet to get the correct opcode. An incorrect value may result in a corrupted flash.

set control 0xDC000021

master_write_32 $m $AsmiControl $control

# Write address to perform sector erase to the lower 4 data

master_write_32 $m $AsmiWriteData0 $addr

This problem is scheduled to be fixed in a  future release of the Intel Quartus Prime Pro software.