Device Family: Intel® Arria® 10, Arria® II, Arria® V, Intel® Cyclone® 10, Cyclone® IV, Cyclone® V, Stratix® IV, Stratix® V

Intel Software: Quartus Prime

Type: Answers

Area: Component

Version Found: v19.1
Bug ID: 1507171803

Why does the Generic Serial Flash Interface (GSFI) Intel® FPGA IP fail to write certain byte into the flash?


Due to the limitation in the Intel® Quartus® Prime software version 19.1 and earlier, certain byte unable to write into the flash due to unsupported byteenable patterns/cases when the GSFI IP is connected to a 64-bit Avalon master and burst data transfer is being used.

Below are the unsupported GSFI IP byteenable patterns/cases:

  • 4'b0110
  • 4'b0111
  • 4'b1110


To work around this problem, either send data in 32-bit width or avoid using the unsupported byteenable patterns/cases.

This problem is scheduled to be resolved in a future release of the Intel® Quartus® Prime software.