Device Family: Intel® Stratix® 10

Type: Answers

Area: Component, Embedded

Last Modified: August 08, 2019
Version Found: v18.1 Update 1
Bug ID: 1806852024
IP: Altera S10 Voltage Sensor, Altera S10 Mailbox Programmable Header Input Argument, Altera S10 Mailbox Client Core, Altera S10 Temperature Sensor, Altera S10 Mailbox Client Programmable

Why does reconfiguration of Intel® Stratix® 10 devices fail with designs containing an instance of any of the SDM Mailbox IPs?


Due to a known problem in Intel® Quartus® Prime Pro Edition Software version 18.1 Update 1 and later, while attempting to reconfigure an Intel Stratix® 10 device via any of the supported configuration methods, including Configuration via Protocol (CvP),  you may see the device get stuck and require a power cycle to recover.

This may be seen if the design uses Intel Stratix 10 Mailbox Client IP commands on its own for accessing the Stratix 10 Secure Device Manager peripherals or via software IPs such as Intel Stratix 10 Temperature Sensor  / Intel Stratix 10 Voltage Sensor / Chip ID Intel Stratix 10 FPGA IP core / Stratix 10 Serial Flash Mailbox Client Intel FPGA IP core / Intel Stratix 10 Partial Reconfiguration Controller IP Core or HPS cold resets on Intel Stratix 10 Hard Processor System. 






This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro Edition Software.

A patch is available to fix this problem for the Intel Quartus Prime Pro Edition software. This patch can also be installed over a Standalone version of Quartus Programmer version.

Download and install Patch 0.29fw from the appropriate link below for Intel Quartus Prime Pro version 19.1.

Download and install Patch 0.13 from the appropriate link below for Intel Quartus Prime Pro version 19.2.